#define
SOC_ADC_SUPPORTED
1
#define
SOC_DAC_SUPPORTED
1
#define
SOC_UART_SUPPORTED
1
#define
SOC_MCPWM_SUPPORTED
1
#define
SOC_GPTIMER_SUPPORTED
1
#define SOC_SDMMC_HOST_SUPPORTED 1
#define
SOC_BT_SUPPORTED
1
#define
SOC_PCNT_SUPPORTED
1
#define
SOC_PHY_SUPPORTED
1
#define
SOC_WIFI_SUPPORTED
1
#define SOC_SDIO_SLAVE_SUPPORTED 1
#define
SOC_TWAI_SUPPORTED
1
#define
SOC_EFUSE_SUPPORTED
1
#define
SOC_EMAC_SUPPORTED
1
#define
SOC_ULP_SUPPORTED
1
#define SOC_CCOMP_TIMER_SUPPORTED 1
#define SOC_RTC_FAST_MEM_SUPPORTED 1
#define SOC_RTC_SLOW_MEM_SUPPORTED 1
#define
SOC_RTC_MEM_SUPPORTED
1
#define
SOC_I2S_SUPPORTED
1
#define
SOC_RMT_SUPPORTED
1
#define
SOC_SDM_SUPPORTED
1
#define
SOC_GPSPI_SUPPORTED
1
#define
SOC_LEDC_SUPPORTED
1
#define
SOC_I2C_SUPPORTED
1
#define SOC_SUPPORT_COEXISTENCE 1
#define
SOC_AES_SUPPORTED
1
#define
SOC_MPI_SUPPORTED
1
#define
SOC_SHA_SUPPORTED
1
#define SOC_FLASH_ENC_SUPPORTED 1
#define SOC_SECURE_BOOT_SUPPORTED 1
#define SOC_TOUCH_SENSOR_SUPPORTED 1
#define
SOC_BOD_SUPPORTED
1
#define
SOC_ULP_FSM_SUPPORTED
1
#define
SOC_CLK_TREE_SUPPORTED 1
#define
SOC_MPU_SUPPORTED
1
#define
SOC_WDT_SUPPORTED
1
#define SOC_SPI_FLASH_SUPPORTED 1
#define
SOC_RNG_SUPPORTED
1
#define SOC_LIGHT_SLEEP_SUPPORTED 1
#define SOC_DEEP_SLEEP_SUPPORTED 1
#define SOC_LP_PERIPH_SHARE_INTERRUPT
1 // LP peripherals sharing the same interrupt
source
#define
SOC_PM_SUPPORTED
1
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